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» Logics for Contravariant Simulations
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EUROPAR
2001
Springer
14 years 20 days ago
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
Toshinori Sato, Itsujiro Arita
DAC
1996
ACM
14 years 10 days ago
Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools
This paper provides a case study that shows how a demanding application stresses the capabilities of today's CAD tools, especially in the integration of products from multipl...
Stephen Dean Brown, Naraig Manjikian, Zvonko G. Vr...
ICCAD
1994
IEEE
121views Hardware» more  ICCAD 1994»
14 years 9 days ago
A cell-based power estimation in CMOS combinational circuits
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...
Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen
ICDT
1990
ACM
110views Database» more  ICDT 1990»
14 years 7 days ago
Beginnings of a Theory of General Database Completions
Ordinary logical implication is not enough for answering queries in a logic database, since especially negative information is only implicitly represented in the database state. M...
Stefan Brass
ICCCN
2007
IEEE
14 years 1 days ago
Scalable Peer-to-Peer File Sharing with Efficient Complex Query Support
A good P2P file sharing system is usually expected to achieve the following design goals: scalability, routing efficiency and complex query support. In this paper, we propose such ...
Yan Li, Jyoti Ahuja, Li Lao, Jun-Hong Cui