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VTS
2000
IEEE
99views Hardware» more  VTS 2000»
14 years 3 months ago
Virtual Scan Chains: A Means for Reducing Scan Length in Cores
A novel design-for-test (DFT) technique is presented for designing a core with a “virtual scan chain” which looks (to the system integrator) like it is shorter than the real s...
Abhijit Jas, Bahram Pouya, Nur A. Touba
WISE
2000
Springer
14 years 3 months ago
Modelling the Webspace of an Intranet
Searching the internet using the currently available searchengines is not satisfactory. Thetechniquesused there focus on the extraction of relevant informationdirectlyfrom the doc...
Roelof van Zwol, Peter M. G. Apers
ECCV
2000
Springer
14 years 3 months ago
How Does CONDENSATION Behave with a Finite Number of Samples?
Abstract. Condensation is a popular algorithm for sequential inference that resamples a sampled representation of the posterior. The algorithm is known to be asymptotically correct...
Oliver D. King, David A. Forsyth
ICDE
2010
IEEE
176views Database» more  ICDE 2010»
14 years 3 months ago
Efficient fuzzy type-ahead search in TASTIER
TASTIER is a research project on the new information-access paradigm called type-ahead search, in which systems find answers to a keyword query on-the-fly as users type in the quer...
Guoliang Li, Shengyue Ji, Chen Li, Jiannan Wang, J...
ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
14 years 3 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean