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DAC
1996
ACM
13 years 11 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
DSD
2008
IEEE
125views Hardware» more  DSD 2008»
14 years 2 months ago
On the Complexity of Error Detection Functions for Redundant Residue Number Systems
This paper considers a single-digit error detection in a Redundant Residue Number System (RRNS). Let f be the function that denotes the set of legitimate codes of an RRNS. To anal...
Tsutomu Sasao, Yukihiro Iguchi
IFIP
2009
Springer
14 years 2 months ago
A Pipelined IP Address Lookup Module for 100 Gbps Line Rates and beyond
New Internet services and technologies call for higher packet switching capacities in the core network. Thus, a performance bottleneck arises at the backbone routers, as forwarding...
Domenic Teuchert, Simon Hauger
ARITH
2003
IEEE
14 years 27 days ago
High-Radix Iterative Algorithm for Powering Computation
A high-radix composite algorithm for the computation of the powering function (¤¦¥ ) is presented in this paper. The algorithm consists of a sequence of overlapped operations: ...
José-Alejandro Piñeiro, Milos D. Erc...
ISBI
2007
IEEE
14 years 1 months ago
Direct Reconstruction of Spiral Mri Using Least Squares Quantization Table
The least squares quantization table (LSQT) method is proposed to accelerate the direct Fourier transform for reconstructing images from nonuniformly sampled data, similar to the ...
Dong Liang, Edmund Y. Lam, George S. K. Fung