ARITH 2003 - PDF Preprint Papers

ARITH 2003 IEEE Symposium on Computer Arithmetic

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed ARITH-2003 Paper

click to vote

ARITH
2003
IEEE

170views Applied Computing» more ARITH 2003»

The Interval Logarithmic Number System

14 years 5 months ago

Download www.acsel-lab.com

This paper introduces the Interval Logarithmic Number System (ILNS), in which the Logarithmic Number System (LNS) is used as the underlying number system for interval arithmetic. ...

Mark G. Arnold, Jesus Garcia, Michael J. Schulte

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	170	The Interval Logarithmic Number System	claim
2	134	Revisiting SRT Quotient Digit Selection	claim
3	126	Prescaled Integer Division	claim
4	117	Some Optimizations of Hardware Multiplication by Constant Matrices	claim
5	105	High-Radix Iterative Algorithm for Powering Computation	claim
6	100	High-Performance Left-to-Right Array Multiplier Design	claim
7	100	Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders	claim
8	96	On-Line Multiplication in Real and Complex Base	claim
9	95	Representable Correcting Terms for Possibly Underflowing Floating Point Operations	claim
10	93	"Partially Rounded" Small-Order Approximations for Accurate, Hardware-Oriented, Table-Based Methods	claim
11	92	A VLSI Algorithm for Modular Multiplication/Division	claim
12	89	Isolating Critical Cases for Reciprocals Using Integer Factorization	claim
13	89	A New Iterative Structure for Hardware Division: The Parallel Paths Algorithm	claim
14	86	Theorems on Efficient Argument Reductions	claim
15	85	Scaling an RNS Number Using the Core Function	claim
16	83	On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge	claim
17	83	SRT Division Algorithms as Dynamical Systems	claim
18	81	The Case for a Redundant Format in Floating Point Arithmetic	claim
19	80	Decimal Floating-Point: Algorism for Computers	claim
20	78	Worst Cases and Lattice Reduction	claim
21	76	A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over GF(2m) Using an Optimal Normal Basis of Type II	claim
22	64	Saturating Counters: Application and Design Alternatives	claim
23	59	Multiple-Precision Fixed-Point Vector Multiply-Accumulator Using Shared Segmentation	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers