Sciweavers

52 search results - page 3 / 11
» Loop Alignment for Memory Accesses Optimization
Sort
View
CODES
2000
IEEE
14 years 1 days ago
Co-design of interleaved memory systems
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
Hua Lin, Wayne Wolf
ICS
2000
Tsinghua U.
13 years 11 months ago
Fast greedy weighted fusion
Loop fusion is important to optimizing compilers because it is an important tool in managing the memory hierarchy. By fusing loops that use the same data elements, we can reduce t...
Ken Kennedy
IPPS
2007
IEEE
14 years 1 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
TCAD
2008
127views more  TCAD 2008»
13 years 7 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 5 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou