173 search results - page 18 / 35 » Loop Parallelization Algorithms: From Parallelism Extraction... |
IPPS
1998
IEEE
14 years 21 days ago
1998
IEEE
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
NAACL
2003
13 years 9 months ago
2003
Leximancer is a software system for performing conceptual analysis of text data in a largely language independent manner. The system is modelled on Content Analysis and provides u...
ISHPC
2003
Springer
14 years 1 months ago
2003
Springer
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
PPOPP
1997
ACM
14 years 19 days ago
1997
ACM
As shared-memory multiprocessors become the dominant commodity source of computation, parallelizing compilers must support mainstream computations that manipulate irregular, point...