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LCTRTS
1999
Springer
13 years 11 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
TIME
2005
IEEE
14 years 1 months ago
Search Strategies for Resolution in CTL-Type Logics: Extension and Complexity
A clausal resolution approach originally developed for the branching logic CTL has recently been extended to the logics ECTL and ECTL+ . In the application of the resolution rules...
Artie Basukoski, Alexander Bolotov
SEFM
2009
IEEE
14 years 2 months ago
Adjusted Verification Rules for Loops Are More Complete and Give Better Diagnostics for Less
—Increasingly, tools and their underlying theories are able to cope with “real code” written as part of industrial grade applications almost as is. It has been our experience...
Patrice Chalin
ICRA
2003
IEEE
110views Robotics» more  ICRA 2003»
14 years 22 days ago
Modelling of the human paralysed lower limb under FES
— The new generation of implanted neuroprostheses allows muscles to be controlled with fine accuracy, high selectivity and the repeatability of the muscle’s response can be ach...
David Guiraud, Philippe Poignet, Pierre-Brice Wieb...
DAC
2002
ACM
14 years 8 months ago
An integer linear programming based approach for parallelizing applications in On-chip multiprocessors
With energy consumption becoming one of the first-class optimization parameters in computer system design, compilation techniques that consider performance and energy simultaneous...
Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer