87 search results - page 5 / 18 » Low Energy, Highly-Associative Cache Design for Embedded Pro... |
142
click to vote
DAC
2007
ACM
16 years 4 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
155
click to vote
CASES
2004
ACM
15 years 9 months ago
2004
ACM
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
137
Voted
MICRO
1997
IEEE
15 years 8 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
110
click to vote
ISVLSI
2003
IEEE
15 years 9 months ago
2003
IEEE
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
114
click to vote
DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...