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IBMRD
2006
63views more  IBMRD 2006»
15 years 6 months ago
Decomposing the load-store queue by function for power reduction and scalability
Because they are based on large content-addressable memories, load-store queues (LSQ) present implementation challenges in superscalar processors, especially as issue width and nu...
Lee Baugh, Craig B. Zilles
OSDI
2008
ACM
16 years 6 months ago
Greening the Switch
Active research is being conducted in reducing power consumption of all the components of the Internet. To that end, we propose schemes for power reduction in network switches - T...
Ganesh Ananthanarayanan, Randy H. Katz
ICRA
2005
IEEE
151views Robotics» more  ICRA 2005»
15 years 11 months ago
Landmark Based Position Estimation for Pinpoint Landing on Mars
- Many of NASA's planned missions for the coming decade will require a pinpoint landing (PPL) capability, whether for sample acquisition and return or for precise insertion in...
Yang Cheng, Adnan Ansar
ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
15 years 10 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
MAM
2006
78views more  MAM 2006»
15 years 6 months ago
Operating system power minimization through run-time processor resource adaptation
The increasingly constrained power budget of today's microprocessor has resulted in a situation where power savings of all components in a system have to be taken into consid...
Tao Li, Lizy Kurian John