1307 search results - page 119 / 262 » Low Power Hardware for a High Performance PDA |
162
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CODES
2006
IEEE
16 years 7 days ago
2006
IEEE
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
153
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DATE
2007
IEEE
16 years 16 days ago
2007
IEEE
Content addressable memory (CAM) is widely used in many applications that require fast table lookup. Due to the parallel comparison feature and high frequency of lookup, however, ...
144
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ERSA
2006
15 years 7 months ago
2006
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
164
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ISCA
2011
IEEE
14 years 10 months ago
2011
IEEE
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
158
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MSS
2000
IEEE
15 years 10 months ago
2000
IEEE
The InTENsity PowerWall is a display system used for high-resolution visualization of very large volumetric data sets. The display is linked to two separate computing environments...