Sciweavers

1307 search results - page 257 / 262
» Low Power Hardware for a High Performance PDA
Sort
View
ISPDC
2010
IEEE
13 years 6 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
VLDB
2007
ACM
145views Database» more  VLDB 2007»
14 years 7 months ago
Executing Stream Joins on the Cell Processor
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
Bugra Gedik, Philip S. Yu, Rajesh Bordawekar
INFOCOM
2009
IEEE
14 years 2 months ago
Nuclei: GPU-Accelerated Many-Core Network Coding
—While it is a well known result that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its...
Hassan Shojania, Baochun Li, Xin Wang
DAC
2010
ACM
13 years 11 months ago
Processor virtualization and split compilation for heterogeneous multicore embedded systems
Complex embedded systems have always been heterogeneous multicore systems. Because of the tight constraints on power, performance and cost, this situation is not likely to change a...
Albert Cohen, Erven Rohou
COMCOM
2006
121views more  COMCOM 2006»
13 years 7 months ago
Load-balanced agent activation for value-added network services
In relation to its growth in size and user population, the Internet faces new challenges that have triggered the proposals of value-added network services, e.g., IP multicast, IP ...
Chao Gong, Kamil Saraç, Ovidiu Daescu, Bala...