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ASPDAC
1998
ACM
81views Hardware» more  ASPDAC 1998»
13 years 11 months ago
Low Power Realization of FIR Filters Implemented using Distributed Arithmetic
Mahesh Mehendale, Amit Sinha, Sunil D. Sherlekar
IEICET
2008
106views more  IEICET 2008»
13 years 7 months ago
Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Comm
Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters a...
Jimson Mathew, R. Mahesh, A. Prasad Vinod, Edmund ...
ISCAS
2003
IEEE
126views Hardware» more  ISCAS 2003»
14 years 23 days ago
Low power block based FIR filtering cores
— The authors present a number of complete cores which are specially tailored for the low power implementation of FIR filters executed using block processing. The paper reveals t...
Ahmet T. Erdogan, Tughrul Arslan
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
14 years 5 days ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
DSD
2005
IEEE
98views Hardware» more  DSD 2005»
14 years 1 months ago
On LUT Cascade Realizations of FIR Filters
This paper first defines the n-input q-output WS function, as a mathematical model of the combinational part of the distributed arithmetic of a finite impulse response (FIR) ...
Tsutomu Sasao, Yukihiro Iguchi, Takahiro Suzuki