155 search results - page 14 / 31 » Low Power Techniques for Digital GaAs VLSI |
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
We designed and fabricated an 8-bit analog-to- LiSTOF ENERGY-SCAVENGER PERFORMANCE digital converter (ADC) in a 0.5,um Silicon-on-Sapphire CMOS technology. The ultra-low power and ...
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
ASAP
2009
IEEE
13 years 10 months ago
2009
IEEE
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
ANNPR
2006
Springer
13 years 9 months ago
2006
Springer
Abstract. Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward m...
TSP
2008
13 years 7 months ago
2008
The focus of this paper is on VLIW instruction scheduling that minimizes the variation of power consumed by the processor during the execution of a target program. We use rough set...