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GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
14 years 1 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
DELTA
2006
IEEE
14 years 1 months ago
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
14 years 1 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
CIT
2004
Springer
14 years 26 days ago
FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder
Abstract. Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. W...
Saraju P. Mohanty, Renuka Kumara C., Sridhara Naya...
MOBIHOC
2003
ACM
14 years 7 months ago
SHORT: self-healing and optimizing routing techniques for mobile ad hoc networks
On demand routing protocols provide scalable and costeffective solutions for packet routing in mobile wireless ad hoc networks. The paths generated by these protocols may deviate ...
Chao Gui, Prasant Mohapatra