Reducing energy consumption in datacenters is key to building low cost datacenters. To address this challenge, we explore the potential of hybrid datacenter designs that mix low p...
Byung-Gon Chun, Gianluca Iannaccone, Giuseppe Iann...
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The proposed 9T cell utilizes a scheme with separate read and write wordlines; it i...
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
Ya-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-J...