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BMCBI
2006
114views more  BMCBI 2006»
13 years 10 months ago
A direct comparison of protein interaction confidence assignment schemes
Background: Recent technological advances have enabled high-throughput measurements of protein-protein interactions in the cell, producing large protein interaction networks for v...
Silpa Suthram, Tomer Shlomi, Eytan Ruppin, Roded S...
CF
2011
ACM
12 years 10 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 7 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
IWCMC
2009
ACM
14 years 5 months ago
Multiple-antenna multiple-relay system with precoding for multiuser transmission
Multi-hop relaying will play a central role in next generation wireless systems. In this paper a novel relaying strategy that uses multiple-input multiple-output (MIMO) relays in ...
Arash Talebi, Witold A. Krzymien
MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
14 years 5 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim