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IPC
2007
IEEE
15 years 10 months ago
Design and Validation of a Low-Power Network Node for Pervasive Applications
Pervasive computing refers to making many computing devices available throughout the physical environment, while making them effectively invisible to the user. To further increase...
Juan-Carlos Cano, Carlos Miguel Tavares Calafate, ...
CSREAESA
2003
15 years 5 months ago
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
Kugan Vivekanandarajah, Thambipillai Srikanthan, C...
ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
15 years 9 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
15 years 10 months ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha
DATE
2006
IEEE
119views Hardware» more  DATE 2006»
15 years 10 months ago
Bootstrapped full--swing CMOS driver for low supply voltage operation
This paper reports a high speed and low power consumption direct–indirect bootstrapped full–swing CMOS inverter driver circuit (bfi–driver). The simulation results, based o...
José C. García, Juan A. Montiel-Nels...