Sciweavers

224 search results - page 12 / 45
» Low power and high performance design challenges in future t...
Sort
View
MONET
2007
126views more  MONET 2007»
13 years 7 months ago
Performance Evaluation of a Power Management Scheme for Disruption Tolerant Network
Disruption Tolerant Network (DTN) is characterized by frequent partitions and intermittent connectivity. Power management issue in such networks is challenging. Existing power man...
Yong Xi, Mooi Choo Chuah, K. Chang
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 4 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
ASPDAC
2006
ACM
159views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...
Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh...
EVOW
2000
Springer
13 years 11 months ago
Prediction of Power Requirements for High-Speed Circuits
Modern VLSI design methodologies and manufacturing technologies are making circuits increasingly fast. The quest for higher circuit performance and integration density stems from f...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...
CASES
2006
ACM
14 years 1 months ago
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...
Mark Hempstead, Gu-Yeon Wei, David Brooks