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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
14 years 15 days ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
COMSWARE
2006
IEEE
14 years 1 months ago
Middleware for wireless sensor networks: A survey
Given the fast growing technological progress in microelectronics and wireless communication devices, in the near future, it is foreseeable that Wireless Sensor Networks (WSN) wil...
Salem Hadim, Nader Mohamed
WINET
2010
113views more  WINET 2010»
13 years 5 months ago
Designing multihop wireless backhaul networks with delay guarantees
— As wireless access technologies improve in data rates, the problem focus is shifting towards providing adequate backhaul from the wireless access points to the Internet. Existi...
Girija J. Narlikar, Gordon T. Wilfong, Lisa Zhang
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
BMCBI
2004
169views more  BMCBI 2004»
13 years 7 months ago
A power law global error model for the identification of differentially expressed genes in microarray data
Background: High-density oligonucleotide microarray technology enables the discovery of genes that are transcriptionally modulated in different biological samples due to physiolog...
Norman Pavelka, Mattia Pelizzola, Caterina Vizzard...