173 search results - page 23 / 35 » Low power and low voltage CMOS digital circuit techniques |
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
ASPDAC
2011
ACM
12 years 11 months ago
2011
ACM
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...