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» Low power and low voltage CMOS digital circuit techniques
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DATE
2008
IEEE
79views Hardware» more  DATE 2008»
14 years 2 months ago
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
Francesco D'Ascoli, Luca Bacciarelli, Massimiliano...
IJON
2007
118views more  IJON 2007»
13 years 7 months ago
Low power CMOS electronic central pattern generator design for a biomimetic underwater robot
— This paper, presents a feasability study of a central pattern generator-based analog controller for an autonomous robot. The operation of a neuronal circuit formed of electroni...
Young-Jun Lee, Jihyun Lee, Kyung Ki Kim, Yong-Bin ...
ARVLSI
2001
IEEE
305views VLSI» more  ARVLSI 2001»
13 years 11 months ago
Logic Design Considerations for 0.5-Volt CMOS
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
K. Joseph Hass, Jack Venbrux, Prakash Bhatia
DAC
2005
ACM
13 years 9 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
DAC
2003
ACM
14 years 8 months ago
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...