331 search results - page 27 / 67 » Low power implementation of a turbo-decoder on programmable ... |
153
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EH
2005
IEEE
15 years 11 months ago
2005
IEEE
We present a method for evolving and implementing artificial neural networks (ANNs) on Field Programmable Analog Arrays (FPAAs). These FPAAs offer the small size and low power usa...
149
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ASAP
2008
IEEE
16 years 11 days ago
2008
IEEE
NTRU is a public-key cryptosystem based on the shortest vector problem in a lattice which is an alternative to RSA and ECC. This work presents a compact and low power NTRU design ...
124
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FPL
2008
Springer
15 years 7 months ago
2008
Springer
Field-Programmable Gate Arrays (FPGAs) have gained wide acceptance among low- to medium-volume applications. However, there are gaps between FPGA and custom implementations in ter...
173
Voted
DAC
1999
ACM
15 years 10 months ago
1999
ACM
Power efficient design of real-time systems based on programmable processors becomes more important as system functionality is increasingly realized through software. This paper ...
163
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DATE
2006
IEEE
15 years 12 months ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...