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ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
16 years 2 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid
EUC
2005
Springer
15 years 11 months ago
On Tools for Modeling High-Performance Embedded Systems
Abstract. Most of the new embedded systems require high performance processors at low power. To cater to these needs, most semiconductor companies are designing multi-core processo...
Anilkumar Nambiar, Vipin Chaudhary
FORMATS
2009
Springer
16 years 9 days ago
Exploiting Timed Automata for Conformance Testing of Power Measurements
For software development, testing is still the primary choice for investigating the correctness of a system. Automated testing is of utmost importance to support continuous integra...
Matthias Woehrle, Kai Lampka, Lothar Thiele
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 10 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell
JTRES
2010
ACM
15 years 6 months ago
Cyclic executive for safety-critical Java on chip-multiprocessors
Chip-multiprocessors offer increased processing power at a low cost. However, in order to use them for real-time systems, tasks have to be scheduled efficiently and predictably. I...
Anders P. Ravn, Martin Schoeberl