Sciweavers

116 search results - page 15 / 24
» Low power mixed analog-digital signal processing
Sort
View
VLSISP
2010
148views more  VLSISP 2010»
13 years 6 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ICASSP
2011
IEEE
12 years 11 months ago
Sparse common spatial patterns in brain computer interface applications
The Common Spatial Pattern (CSP) method is a powerful technique for feature extraction from multichannel neural activity and widely used in brain computer interface (BCI) applicat...
Fikri Goksu, Nuri Firat Ince, Ahmed H. Tewfik
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
14 years 2 months ago
A Single-supply True Voltage Level Shifter
When a signal traverses on-chip voltage domains, a level shifter is required. Inverters can handle a high to low voltage shift with minimal leakage. For a low to high voltage leve...
Rajesh Garg, Gagandeep Mallarapu, Sunil P. Khatri
ICASSP
2011
IEEE
12 years 11 months ago
Design and implementation of cubic spline interpolation for spike sorting microsystems
Abstract—Accurate spike sorting is important for neuroscientific and neuroprosthetic applications. The sorting of spikes depends on the features extracted from the neural wavefo...
Tung-Chien Chen, Yun-Yu Chen, Tsung-Chuan Ma, Lian...