97 search results - page 6 / 20 » Low power network processor design using clock gating |
CSREAESA
2004
13 years 9 months ago
2004
Discrete wavelet transform has been incorporated as part of the JPEG2000 image compression standard and is being deployed in various portable consumer products. This raises the in...
TVLSI
2010
13 years 2 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
IWSOC
2005
IEEE
14 years 1 months ago
2005
IEEE
A fully programmable radio baseband processor architecture is presented. The architecture is based on a DSP processor core and a number flexible accelerators, connected via a con...
ISCA
2002
IEEE
14 years 17 days ago
2002
IEEE
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
DSN
2009
IEEE
14 years 2 months ago
2009
IEEE
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...