Sciweavers

552 search results - page 40 / 111
» Low power techniques for Motion Estimation hardware
Sort
View
ISLPED
1997
ACM
95views Hardware» more  ISLPED 1997»
15 years 10 months ago
Formalized methodology for data reuse exploration in hierarchical memory mappings
Efficient use of an optimized memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption in data ...
Jean-Philippe Diguet, Sven Wuytack, Francky Cattho...
SOSP
2001
ACM
16 years 2 months ago
Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems
In recent years, there has been a rapid and wide spread of nontraditional computing platforms, especially mobile and portable computing devices. As applications become increasingl...
Padmanabhan Pillai, Kang G. Shin
ISLPED
1995
ACM
96views Hardware» more  ISLPED 1995»
15 years 9 months ago
Towards a high-level power estimation capability
We will present a power estimation technique for digital integrated circuits that operates at the register transfer level RTL. Such a high-level power estimation capability is r...
Farid N. Najm
ICCV
2003
IEEE
16 years 7 months ago
Filtering Using a Tree-Based Estimator
Within this paper a new framework for Bayesian tracking is presented, which approximates the posterior distribution at multiple resolutions. We propose a tree-based representation...
Bjoern Stenger, Arasanathan Thayananthan, Philip H...
ISLPED
2004
ACM
122views Hardware» more  ISLPED 2004»
15 years 11 months ago
Microarchitectural techniques for power gating of execution units
Leakage power is a major concern in current and future microprocessor designs. In this paper, we explore the potential of architectural techniques to reduce leakage through power-...
Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan,...