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DATE
2009
IEEE
170views Hardware» more  DATE 2009»
14 years 2 months ago
A novel LDPC decoder for DVB-S2 IP
Abstract—In this paper a programmable Forward Error Correction (FEC) IP for a DVB-S2 receiver is presented. It is composed of a Low-Density Parity Check (LDPC), a Bose-ChaudhuriH...
Stefan Müller 0004, Manuel Schreger, Marten K...
COMPSYSTECH
2010
13 years 4 months ago
Integration of neural networks and expert systems for time series prediction
: In this paper an approach for development of univariate time series prediction library in Java and its integration with an existing CLIPS related system is presented .A backpropa...
Ventsislav Nikolov, Valeri Bogdanov
IEEEPACT
2003
IEEE
14 years 20 days ago
Memory Hierarchy Design for a Multiprocessor Look-up Engine
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
Jean-Loup Baer, Douglas Low, Patrick Crowley, Neal...
GRAPHICSINTERFACE
2007
13 years 8 months ago
Wavelet encoding of BRDFs for real-time rendering
Acquired data often provides the best knowledge of a material’s bidirectional reflectance distribution function (BRDF). Its integration into most real-time rendering systems re...
Luc Claustres, Loïc Barthe, Mathias Paulin
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
14 years 4 months ago
Quality Improvement Methods for System-Level Stimuli Generation
Functional verification of systems is aimed at validating the integration of previously verified components. It deals with complex designs, and invariably suffers from scarce re...
Roy Emek, Itai Jaeger, Yoav Katz, Yehuda Naveh