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ISCA
2007
IEEE
114views Hardware» more  ISCA 2007»
14 years 1 months ago
Matrix scheduler reloaded
From multiprocessor scale-up to cache sizes to the number of reorder-buffer entries, microarchitects wish to reap the benefits of more computing resources while staying within po...
Peter G. Sassone, Jeff Rupley, Edward Brekelbaum, ...
ICCD
2000
IEEE
120views Hardware» more  ICCD 2000»
13 years 11 months ago
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation
This paper presents a verification technique for functional comparison of large combinational circuits using a novel combination of known approaches. The idea is based on a tight...
Viresh Paruthi, Andreas Kuehlmann
ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
14 years 1 months ago
Transition-aware decoupling-capacitor allocation in power noise reduction
— Dynamic power noises may not only degrade the circuit performance but also reduce the noise margin which may result in the functional errors in integrated circuit. Decoupling c...
Po-Yuan Chen, Che-Yu Liu, TingTing Hwang
SASP
2009
IEEE
222views Hardware» more  SASP 2009»
14 years 2 months ago
Arithmetic optimization for custom instruction set synthesis
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...
Ajay K. Verma, Yi Zhu, Philip Brisk, Paolo Ienne
KI
2008
Springer
13 years 7 months ago
A Drum Machine That Learns to Groove
Music production relies increasingly on advanced hardware and software tools that makes the creative process more flexible and versatile. The advancement of these tools helps reduc...
Axel Tidemann, Yiannis Demiris