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ITC
2002
IEEE
83views Hardware» more  ITC 2002»
14 years 8 days ago
Packet-Based Input Test Data Compression Techniques
1 This paper presents a test input data compression technique, which can be used to reduce input test data volume, test time, and the number of required tester channels. The techni...
Erik H. Volkerink, Ajay Khoche, Subhasish Mitra
MICRO
2000
IEEE
122views Hardware» more  MICRO 2000»
13 years 11 months ago
Dynamic zero compression for cache energy reduction
Dynamic Zero Compression reduces the energy required for cache accesses by only writing and reading a single bit for every zero-valued byte. This energy-conscious compression is i...
Luis Villa, Michael Zhang, Krste Asanovic
TVLSI
2002
98views more  TVLSI 2002»
13 years 7 months ago
Minimizing memory access energy in embedded systems by selective instruction compression
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
CISS
2008
IEEE
14 years 1 months ago
1-Bit compressive sensing
Abstract—Compressive sensing is a new signal acquisition technology with the potential to reduce the number of measurements required to acquire signals that are sparse or compres...
Petros Boufounos, Richard G. Baraniuk
ICES
2010
Springer
106views Hardware» more  ICES 2010»
13 years 5 months ago
The Use of Genetic Algorithm to Reduce Power Consumption during Test Application
Abstract. In this paper it is demonstrated how two issues from the area of testing electronic components can be merged and solved by means of a genetic algorithm. The two issues ar...
Jaroslav Skarvada, Zdenek Kotásek, Josef St...