Sciweavers

3729 search results - page 36 / 746
» METRICS: a system architecture for design process optimizati...
Sort
View
TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 24 days ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
DSD
2009
IEEE
84views Hardware» more  DSD 2009»
14 years 2 months ago
Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
Ayse Kivilcim Coskun, Andrew B. Kahng, Tajana Simu...
COMPUTER
2002
103views more  COMPUTER 2002»
13 years 7 months ago
SimpleScalar: An Infrastructure for Computer System Modeling
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
Todd M. Austin, Eric Larson, Dan Ernst
COMSWARE
2006
IEEE
13 years 11 months ago
Architecting protocol stack optimizations on mobile devices
Applications using traditional protocol stacks (e.g TCP/IP) from wired networks do not function efficiently in mobile wireless scenarios. This is primarily due to the layered archi...
Vijay T. Raisinghani, Sridhar Iyer