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» MPI on a Million Processors
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IPPS
2008
IEEE
14 years 2 months ago
Energy efficient packet classification hardware accelerator
Packet classification is an important function in a router’s line-card. Although many excellent solutions have been proposed in the past, implementing high speed packet classifi...
Alan Kennedy, Xiaojun Wang, Bin Liu
PG
2007
IEEE
14 years 1 months ago
QAS: Real-Time Quadratic Approximation of Subdivision Surfaces
We introduce QAS, an efficient quadratic approximation of subdivision surfaces which offers a very close appearance compared to the true subdivision surface but avoids recursion,...
Tamy Boubekeur, Christophe Schlick
ICPP
2006
IEEE
14 years 1 months ago
Designing Multithreaded Algorithms for Breadth-First Search and st-connectivity on the Cray MTA-2
stractions are extensively used to understand and solve challenging computational problems in various scientific and engineering domains. They have particularly gained prominence...
David A. Bader, Kamesh Madduri
PADS
2004
ACM
14 years 1 months ago
Conservative Synchronization of Large-Scale Network Simulations
Parallel discrete event simulation techniques have enabled the realization of large-scale models of communication networks containing millions of end hosts and routers. However, t...
Alfred Park, Richard M. Fujimoto, Kalyan S. Peruma...
DATE
2003
IEEE
127views Hardware» more  DATE 2003»
14 years 29 days ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar