Sciweavers

877 search results - page 126 / 176
» MXQuery with Hardware Acceleration
Sort
View
CODES
2008
IEEE
14 years 4 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
ISPASS
2007
IEEE
14 years 4 months ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
VTS
2005
IEEE
151views Hardware» more  VTS 2005»
14 years 3 months ago
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers
: This project involves the design of a CMOS RF RMS Detector that converts the RMS voltage amplitude of an RF signal to a DC voltage. Its high input impedance and small area make i...
Alberto Valdes-Garcia, Radhika Venkatasubramanian,...
ASPDAC
2005
ACM
117views Hardware» more  ASPDAC 2005»
14 years 3 months ago
Dynamic symmetry-breaking for improved Boolean optimization
With impressive progress in Boolean Satisfiability (SAT) solving and several extensions to pseudo-Boolean (PB) constraints, many applications that use SAT, such as highperformanc...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
VRST
2003
ACM
14 years 3 months ago
Incremental rendering of deformable trimmed NURBS surfaces
Trimmed NURBS surfaces are often used to model smooth and complex objects. Unfortunately, most existing hardware graphics accelerators cannot render them directly. Although there ...
Gary K. L. Cheung, Rynson W. H. Lau, Frederick W. ...