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ARITH
2003
IEEE
15 years 8 months ago
Decimal Floating-Point: Algorism for Computers
Decimal arithmetic is the norm in human calculations, and human-centric applications must use a decimal floating-point arithmetic to achieve the same results. Initial benchmarks i...
Michael F. Cowlishaw
100
Voted
EUROMICRO
1999
IEEE
15 years 7 months ago
Delft-Java Dynamic Translation
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
C. John Glossner, Stamatis Vassiliadis
TODAES
2008
115views more  TODAES 2008»
15 years 2 months ago
Automata-based assertion-checker synthesis of PSL properties
Abstract-- Automata-based methods for generating PSL hardware assertion checkers were primarily considered for use with temporal sequences, as opposed to full-scale properties. We ...
Marc Boule, Zeljko Zilic
135
Voted
IEEEIAS
2009
IEEE
15 years 10 days ago
Full System Simulation and Verification Framework
In this paper, we propose a framework to develop highperformance system accelerator hardware and the corresponding software at system-level. This framework is designed by integrat...
Jing-Wun Lin, Chen-Chieh Wang, Chin-Yao Chang, Chu...
120
Voted
FPL
2008
Springer
150views Hardware» more  FPL 2008»
15 years 4 months ago
Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs
Wavefront algorithms, such as the Smith-Waterman algorithm, are commonly used in bioinformatics for exact local and global sequence alignment. These algorithms are highly computat...
Betul Buyukkurt, Walid A. Najjar