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ISLPED
2007
ACM
169views Hardware» more  ISLPED 2007»
13 years 9 months ago
Throughput of multi-core processors under thermal constraints
We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
13 years 12 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
HICSS
2005
IEEE
159views Biometrics» more  HICSS 2005»
14 years 1 months ago
A Repeatable Collaboration Process for Usability Testing
Evaluating the usability of an application is a crucial activity in systems development projects. It is often done collaboratively, involving groups of current or future users, us...
Gert-Jan de Vreede, Ann L. Fruhling, Anita Chakrap...
PCI
2005
Springer
14 years 1 months ago
Protein Classification with Multiple Algorithms
Nowadays, the number of protein sequences being stored in central protein databases from labs all over the world is constantly increasing. From these proteins only a fraction has b...
Sotiris Diplaris, Grigorios Tsoumakas, Pericles A....
ICPP
1999
IEEE
13 years 12 months ago
SLC: Symbolic Scheduling for Executing Parameterized Task Graphs on Multiprocessors
Task graph scheduling has been found effective in performance prediction and optimization of parallel applications. A number of static scheduling algorithms have been proposed for...
Michel Cosnard, Emmanuel Jeannot, Tao Yang