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EUROPAR
2009
Springer
13 years 11 months ago
StarPU: A Unified Platform for Task Scheduling on Heterogeneous Multicore Architectures
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
Cédric Augonnet, Samuel Thibault, Raymond N...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 5 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
DILS
2005
Springer
14 years 1 months ago
Information Integration and Knowledge Acquisition from Semantically Heterogeneous Biological Data Sources
Abstract. We present INDUS (Intelligent Data Understanding System), a federated, query-centric system for knowledge acquisition from autonomous, distributed, semantically heterogen...
Doina Caragea, Jyotishman Pathak, Jie Bao, Adrian ...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
23
Voted
DAC
2006
ACM
14 years 8 months ago
Prediction-based flow control for network-on-chip traffic
Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of...
Ümit Y. Ogras, Radu Marculescu