This article focuses on the application of artificial evolution to the synthesis of analog active filters. The main objective of this research is the achievement of a new class of...
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
It is anticipated that self assembled ultra-dense nanomemories will be more susceptible to manufacturing defects and transient faults than conventional CMOS-based memories, thus t...
Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Va...
This paper presents an efficient hierarchical 3D capacitance extraction algorithm -- ICCAP. Most previous capacitance extraction algorithms introduce intermediate variables to fac...
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...