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GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
14 years 10 days ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili
DAC
2005
ACM
13 years 9 months ago
Timing-driven placement by grid-warping
Grid-warping is a recent placement strategy based on a novel physical analogy: rather than move the gates to optimize their location, it elastically deforms a model of the 2-D chi...
Zhong Xiu, Rob A. Rutenbar
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 29 days ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
PIMRC
2008
IEEE
14 years 1 months ago
BER analysis of single-carrier MPAM in the presence of ADC quantization noise
— Noisy radio frequency (RF) circuits tend to degrade the system performance, especially in high frequency communication systems. The performance analysis of such systems is norm...
Umar H. Rizvi, Gerard J. M. Janssen, Jos H. Weber

Publication
351views
15 years 7 months ago
Synthesizable High Level Hardware Descriptions
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...
Jennifer Gillenwater, Gregory Malecha, Cherif Sala...