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ASYNC
1997
IEEE
123views Hardware» more  ASYNC 1997»
13 years 11 months ago
On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper. The main advantage of temary logic is the easy realisation of...
Riccardo Mariani, Roberto Roncella, Roberto Salett...
SYNTHESE
2008
114views more  SYNTHESE 2008»
13 years 7 months ago
Quantified coalition logic
We add a limited but useful form of quantification to Coalition Logic, a popular formalism for reasoning about cooperation in game-like multi-agent systems. The basic constructs o...
Thomas Ågotnes, Wiebe van der Hoek, Michael ...
PRDC
2007
IEEE
14 years 1 months ago
Generic Fault-Tolerance Mechanisms Using the Concept of Logical Execution Time
Model-based development has become state of the art in software engineering. Unfortunately, the used code generators often focus on the pure application functionality. Features li...
Christian Buckl, Matthias Regensburger, Alois Knol...
FOIKS
2010
Springer
14 years 1 months ago
Towards a Paradoxical Description Logic for the Semantic Web
As a vision for the future of the Web, the Semantic Web is an open, constantly changing and collaborative environment. Hence it is reasonable to expect that knowledge sources in th...
Xiaowang Zhang, Zuoquan Lin, Kewen Wang
DSD
2010
IEEE
126views Hardware» more  DSD 2010»
13 years 7 months ago
Low Power FPGA Implementations of 256-bit Luffa Hash Function
Low power techniques in a FPGA implementation of the hash function called Luffa are presented in this paper. This hash function is under consideration for adoption as standard. Tw...
Paris Kitsos, Nicolas Sklavos, Athanassios N. Skod...