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» Making register file resistant to power analysis attacks
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CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 11 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
AFRICACRYPT
2010
Springer
14 years 2 months ago
Fresh Re-keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices
The market for RFID technology has grown rapidly over the past few years. Going along with the proliferation of RFID technology is an increasing demand for secure and privacy-prese...
Marcel Medwed, François-Xavier Standaert, J...
CODES
2007
IEEE
14 years 1 months ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
14 years 29 days ago
Improving the Security of Dual-Rail Circuits
Dual-rail encoding, return-to-spacer protocol and hazard-free logic can be used to resist differential power analysis attacks by making the power consumption independent of process...
Danil Sokolov, Julian Murphy, Alexandre V. Bystrov...
MOBISYS
2005
ACM
14 years 7 months ago
Shake them up!: a movement-based pairing protocol for CPU-constrained devices
This paper presents a new pairing protocol that allows two CPU-constrained wireless devices Alice and Bob to establish a shared secret at a very low cost. To our knowledge, this i...
Claude Castelluccia, Pars Mutaf