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CODES
2005
IEEE
14 years 2 months ago
Novel architecture for loop acceleration: a case study
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
Seng Lin Shee, Sri Parameswaran, Newton Cheung
CASES
2008
ACM
13 years 11 months ago
Cache-aware cross-profiling for java processors
Performance evaluation of embedded software is essential in an early development phase so as to ensure that the software will run on the embedded device's limited computing r...
Walter Binder, Alex Villazón, Martin Schoeb...
CASES
2006
ACM
14 years 2 months ago
A dynamic binary instrumentation engine for the ARM architecture
Dynamic binary instrumentation (DBI) is a powerful technique for analyzing the runtime behavior of software. While numerous DBI frameworks have been developed for general-purpose ...
Kim M. Hazelwood, Artur Klauser
CBSE
2006
Springer
14 years 20 days ago
Towards Encapsulating Data in Component-Based Software Systems
Abstract. A component-based system consists of components linked by connectors. Data can reside in components and/or in external data stores. Operations on data, such as access, up...
Kung-Kiu Lau, Faris M. Taweel
TASE
2008
IEEE
14 years 3 months ago
Verifying BPEL-Like Programs with Hoare Logic
The WS-BPEL language has recently become a de facto standard for modeling Web-based business processes. One of its essential features is the fully programmable compensation mechan...
Chenguang Luo, Shengchao Qin, Zongyan Qiu