Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
K. T. Gribbon, Donald G. Bailey, Christopher T. Jo...
Various commercial programmable compute platforms have their processor architecture enhanced with field-programmable gate arrays (FPGAs). In a common usage scenario, an applicatio...
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...