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IPPS
2007
IEEE
14 years 2 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
13 years 11 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
CIKM
2003
Springer
14 years 28 days ago
Automated index management for distributed web search
Distributed heterogeneous search systems are an emerging phenomenon in Web search, in which independent topic-specific search engines provide search services, and metasearchers d...
Rinat Khoussainov, Nicholas Kushmerick
DAC
2005
ACM
14 years 8 months ago
System-level energy-efficient dynamic task scheduling
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
Jianli Zhuo, Chaitali Chakrabarti
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
14 years 1 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt