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151
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ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
16 years 26 days ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong
123
Voted
SAC
2009
ACM
15 years 10 months ago
Development of a biosignals framework for usability analysis
The understanding of human physical and physiological signals and expressions, together with a growing processing and control capacity allows for new approaches in interactive sys...
Inês Oliveira, Rui Lopes, Nuno Guimarã...
ECSCW
2003
15 years 5 months ago
Informing the Development of Calendar Systems for Domestic Use
This paper contributes to the design of Groupware Calendar Systems (GCSs) for use in domestic life. We consider a number of ethnographic studies of calendar use in domestic circums...
Andy Crabtree, Terry Hemmings, Tom Rodden, John A....
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
14 years 7 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
CLUSTER
2009
IEEE
15 years 10 months ago
Utility analysis for Internet-oriented server consolidation in VM-based data centers
—Server consolidation based on virtualization technology will simplify system administration, reduce the cost of power and physical infrastructure, and improve utilization in tod...
Ying Song, Yanwei Zhang, Yuzhong Sun, Weisong Shi