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HIPEAC
2009
Springer
15 years 9 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...
BMCBI
2005
126views more  BMCBI 2005»
15 years 2 months ago
HomoMINT: an inferred human network based on orthology mapping of protein interactions discovered in model organisms
Background: The application of high throughput approaches to the identification of protein interactions has offered for the first time a glimpse of the global interactome of some ...
Maria Persico, Arnaud Ceol, Caius Gavrila, Robert ...
115
Voted
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 2 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
109
Voted
ICCAD
2002
IEEE
117views Hardware» more  ICCAD 2002»
15 years 11 months ago
An energy-conscious algorithm for memory port allocation
Multiport memories are extensively used in modern system designs because of the performance advantages they offer. The increased memory access throughput could lead to significan...
Preeti Ranjan Panda, Lakshmikantam Chitturi
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
15 years 8 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...