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» Mapping Computation with No Memory
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DATE
2009
IEEE
103views Hardware» more  DATE 2009»
14 years 3 months ago
A set-based mapping strategy for flash-memory reliability enhancement
—With wide applicability of flash memory in various application domains, reliability has become a very critical issue. This research is motivated by the needs to resolve the lif...
Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, Tei...
ISCAS
1999
IEEE
61views Hardware» more  ISCAS 1999»
14 years 1 months ago
A transformation for computational latency reduction in turbo-MAP decoding
The SOVA and the log-MAP are commonly used in turbo decoding. In this paper, we propose to modify the sliding window MAP-algorithm in [5]to reduce the computational delay even fur...
Arun Raghupathy, K. J. Ray Liu
DAC
2007
ACM
14 years 9 months ago
Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification
Programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potentia...
Pramod Chandraiah, Rainer Dömer
DAGSTUHL
2007
13 years 10 months ago
Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures
The model-based transformation of loop programs is a way of detecting fine-grained parallelism in sequential programs. One of the challenges is to agglomerate the parallelism to a...
Armin Größlinger