Sciweavers

20 search results - page 4 / 4
» Mapping Structures for Flash Memories: Techniques and Open P...
Sort
View
CASES
2007
ACM
13 years 11 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov
ICSE
2008
IEEE-ACM
14 years 8 months ago
Scalable detection of semantic clones
Several techniques have been developed for identifying similar code fragments in programs. These similar fragments, referred to as code clones, can be used to identify redundant c...
Mark Gabel, Lingxiao Jiang, Zhendong Su

Publication
303views
12 years 5 months ago
Evolutionary synthesis of analog networks
he significant increase in the available computational power that took place in recent decades has been accompanied by a growing interest in the application of the evolutionary ap...
Claudio Mattiussi
IPPS
2010
IEEE
13 years 5 months ago
Optimization of linked list prefix computations on multithreaded GPUs using CUDA
We present a number of optimization techniques to compute prefix sums on linked lists and implement them on multithreaded GPUs using CUDA. Prefix computations on linked structures ...
Zheng Wei, Joseph JáJá
PARA
1995
Springer
13 years 11 months ago
A Proposal for a Set of Parallel Basic Linear Algebra Subprograms
This paper describes a proposal for a set of Parallel Basic Linear Algebra Subprograms PBLAS. The PBLAS are targeted at distributed vector-vector, matrix-vector and matrixmatrix...
Jaeyoung Choi, Jack Dongarra, Susan Ostrouchov, An...