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» Mapping between Levels in the Metamodel Architecture
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DATE
1998
IEEE
153views Hardware» more  DATE 1998»
13 years 11 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
DAC
2005
ACM
14 years 8 months ago
Logic block clustering of large designs for channel-width constrained FPGAs
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
Marvin Tom, Guy G. Lemieux
ISCC
2003
IEEE
153views Communications» more  ISCC 2003»
14 years 22 days ago
An Object-Based MPEG-4 Multimedia Content Classification Model for IP QoS Differentiation
In this article, we investigate efficient transmission of Object-based MPEG-4 video over IP networks with QoS management capabilities. MPEG-4 Audio Visual Objects (AVOs) are class...
Toufik Ahmed, Abdelhamid Nafaa, Ahmed Mehaoua
ACSAC
2000
IEEE
13 years 12 months ago
Enabling Secure On-Line DNS Dynamic Update
Domain Name System (DNS) is the system for the mapping between easily memorizable host names and their IP addresses. Due to its criticality, security extensions to DNS have been p...
Xunhua Wang, Yih Huang, Yvo Desmedt, David Rine
PAM
2004
Springer
14 years 24 days ago
Measurements and Laboratory Simulations of the Upper DNS Hierarchy
Given that the global DNS system, especially at the higher root and top-levels, experiences significant query loads, we seek to answer the following questions: (1) How does the ch...
Duane Wessels, Marina Fomenkov, Nevil Brownlee, Ki...