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» Massively parallel processing on a chip
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PDPTA
2007
13 years 9 months ago
Software Support for Non-Numerical Computing on Multi-Core Chips
- Multi-core chips present a new computing environment that can benefit from software support for non-numerical applications. Heterogeneous cores will allow efficient sophisticated...
Jerry Potter, Howard Jay Siegel
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
13 years 11 months ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
CLUSTER
2009
IEEE
14 years 2 months ago
Analyzing massive astrophysical datasets: Can Pig/Hadoop or a relational DBMS help?
Abstract— As the datasets used to fuel modern scientific discovery grow increasingly large, they become increasingly difficult to manage using conventional software. Parallel d...
Sarah Loebman, Dylan Nunley, YongChul Kwon, Bill H...
IJCNN
2007
IEEE
14 years 1 months ago
Implementation of multi-layer leaky integrator networks on a cellular processor array
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...
David R. W. Barr, Piotr Dudek, Jonathan M. Chamber...
ASPDAC
2000
ACM
92views Hardware» more  ASPDAC 2000»
13 years 11 months ago
Genetic algorithm accelerator GAA-II
We have developed a new GA hardware called GAA-I (Genetic Algorithm Accelerator-I), in which the crossover operator to be applied to each individual was dynamically selected during...
Shin'ichi Wakabayashi, Tetsushi Koide, Nayoshi Tos...