391 search results - page 22 / 79 » Massively parallel processing on a chip |
ICDCSW
2007
IEEE
14 years 1 months ago
2007
IEEE
We have developed a data stream management system that supports declarative stream queries running over high data volumes in a supercomputing environment. To enable specification ...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-OnChip (NoC) provide a structured way of realizing interconnections on silic...