391 search results - page 65 / 79 » Massively parallel processing on a chip |
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
—Lattice Boltzmann Methods (LBM) are used for the computational simulation of Newtonian fluid dynamics. LBM-based simulations are readily parallelizable; they have been implemen...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we empirically evaluate fundamental design trade-offs among the most recent multicore processors and accelerator technologies. Our primary aim is to aid application...
HIPC
2007
Springer
14 years 1 months ago
2007
Springer
: The Cell is a heterogeneous multi-core processor, which has eight co-processors, called SPEs. The SPEs can access a common shared main memory through DMA, and each SPE can direct...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...